诗词屋>英语词典>instruction execution翻译和用法

instruction execution

英 [ɪnˈstrʌkʃn ˌeksɪˈkjuːʃn]

美 [ɪnˈstrʌkʃn ˌeksɪˈkjuːʃn]

网络  指令执行

计算机

英英释义

noun

  • (computer science) the process of carrying out an instruction by a computer
      Synonym:execution

    双语例句

    • As the core of SOC, CPU ′ s performance is mostly determined by instruction ′ s execution efficiency. Pipeline increases the instruction ′ s execution pace and improves the CPU ′ s performance.
      作为SOC的核心,CPU的性能主要取决于指令的执行效率,而采用流水线方式大大增加了指令的执行速度,提高了CPU的性能。
    • The platform introduces two memory system structure, addressing mode simulation guarantees that not only the operand is correctly obtained, but also the instruction execution time is correctly calculated.
      采用了两种存储器体系结构,寻址方式的模拟不仅保证了正确地确定操作数,而且能够正确统计指令执行时间。
    • In other words, software interrupts always occur at the beginning of an instruction execution cycle.
      换句话说,软件中断常常在指令运行周期的开始。
    • Research and Analysis of the Value Prediction and Instruction Reuse Techniques in Speculated Execution
      推测执行中值预测与指令重用技术的研究与分析
    • Compile the assembler into machine code so that generate PLE file in order to implement the execution mechanism of PLC virtual machine. In this way, the instruction execution speed of PLC is greatly increased and we can save much memory.
      用汇编编译器编译转变成功的汇编程序产生机器码,从而构造出可执行文件&PLE文件,实现PLC虚拟机的机器码执行机制,这样大大提高了PLC指令的执行速度,同时大大节约了内存空间。
    • A technique whereby the receiver fetches the next instruction before completing execution of the previous instruction, in order to increase processing speed.
      在前一条指令全部执行完之前就开始取下一条指令,以提高处理速度的一种技术。
    • Characteristics of the microprocessor are fast speed and nimble instructions. The way of raising speed is to adopt pipelining in instruction execution.
      它的运算速度提高的途径是指令的执行采用流水线方式,指令缓冲部件IB采用两个体交替接收指令和执行指令的办法来减少取指令的等待时间。
    • The model of instruction level parallel program execution
      指令级并行程序执行模型
    • Static instruction scheduling decides the execution order of instructions and improves the instruction-level parallelism by reducing stall caused by dependences.
      静态指令调度决定指令执行顺序,屏蔽指令间由于依赖关系而产生的延迟,从而提高了指令的并行度。
    • Traditional programming model like C, C++ and Fortran are poorly suited to multi-core architectures because of the assumed single instruction stream execution model and centralized memory structure.
      C、C++和Fortran等基于单指令流和统一存储结构的传统编程模型已经无法适应多核处理器结构。